Artificial Intelligence for Wafer Production Monitoring


Abstract

The chips contained in every electronic device are manufactured over circular silicon wafers. The growing demand of semiconductors in nearly all the industrial sectors has made human quality inspection of wafers infeasible. Thus, electronics and semiconductors manufacturers require advanced Artificial Intelligence techniques to automatically monitor their entire production. Here we present the research projects established in a collaboration between Politecnico di Milano and STMicroelectronics, in which we design deep learning models to recognize and interpret defect patterns in silicon wafers during manufacturing.

Classes of Defects in WDM

Fig.1: (a) a Silicon Wafer; (b) examples of Wafer Defect Maps (WDMs) from the classes included in the ST dataset, and total number of samples in each class.

Wafer Defect Maps Classification

The primary research goal we addressed was the automatic detection of problems and failures in the production process. Quality inspection machines can exclusively identify localized defects, returning a list of defective locations in each wafer, namely a Wafer Defect Map (WDM). Production issues such as a robot accidentally scratching the wafer surface, can be detected by analyzing patterns over the WDM. Not surprisingly, the classification of defect patterns has been widely investigated in the literature but in rather simplistic settings where i) all the classes of defect patterns are assumed to be known and represented in the training set and ii) WDMs are transformed into low-resolution images.

The major outcomes of this research collaboration are:

  • an ad-hoc Convolutional Neural Network (CNN), currently deployed in several STMicroelectronics production sites, that can process full resolution WDMs despite their huge size (defect coordinates span a 20,000x20,000 grid, corresponding to a precision of 10 micron)[di Bella et al. 2019] . This solution has been patented [Moioli et al. 2021] ;
  • an extension of our CNN to address Open-set Recognition, namely a classification problem where unknown defect patterns must be detected during testing [Frittoli et al. 2022] ;
  • a visual explanation tool for the output of a CNN, called Augmented Grad-CAM, to support decision making [Morbidelli et al. 2020] ;


References

[Frittoli et al. 2022] Deep Open-Set Recognition for Silicon Wafer Production Monitoring
Luca Frittoli, Diego Carrera, Beatrice Rossi, Pasqualina Fragneto, Giacomo Boracchi
Pattern Recognition 124(11):108488 2022
(Preprint)

[Moioli et al. 2021] Wafer manufacturing system, device and method
Lidia Moioli, Pasqualina Fragneto, Beatrice Rossi, Diego Carrera, Giacomo Boracchi, Mauro Fumagalli, Elena Tagliabue, Paolo Giugni, and Annalisa Aurigemma
February 16 2021. US Patent 10,922,807

[Morbidelli et al. 2021] Augmented Grad-CAM: heat-maps super resolution through augmentation
Pietro Morbidelli, Diego Carrera, Beatrice Rossi, Pasqualina Fragneto, Giacomo Boracchi
IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) 2020
(Preprint), (Code), (Supplementary Material), (Poster)

[di Bella et al. 2022] Wafer defect map classification using sparse convolutional networks
Roberto di Bella, Diego Carrera, Beatrice Rossi, Pasqualina Fragneto, Giacomo Boracchi
International Conference on Image Analysis and Processing (ICIAP) 2019
(Preprint)

[Frittoli et al. 2022b] Artificial Intelligence for Silicon Wafer Production Monitoring
Luca Frittoli, Nicolò Folloni, Diego Carrera, Beatrice Rossi, Pasqualina Fragneto, Giacomo Boracchi
Ital-IA22 Workshop (paper)